The present application is directed to a Digitally Programmable Pulse-Width Modulation (PWM) Converter and more specifically a converter for modifying the start and stop duty cycles of the PWM signal.
In the automotive field, position and torque sensors are now being introduced. One specific application is for the steering of an automobile. Such sensors provide their outputs in two basic forms, i.e., analog and digital. Among the formats for digital outputs are a) serial and parallel data derived from Analog-to-Digital Converters (ADC""s), b) pulse frequency representing the analog sensor output, derived from Voltage-to-Frequency Converters (VFC), and c) a Pulse Width Modulated (PWM) output where the duty cycle of the pulse represents the sensor output.
Several PWM circuits have been developed that provide 0% to 100% duty cycles to represent the full scale output of the sensor. However, specialized applications require the start and stop duty cycles to be very specific, e.g., 5% and 95% to represent the total sensor full scale output.
When the foregoing PWM signal is being used as a control signal in a feedback control circuit (for example, for controlling steering), reliability is very important. For example, from a digital standpoint it is hard to identify a 0% PWM signal. This is especially true where angular rotation of a steering is being sensed (which has more than one turn) and thus an almost 100% duty cycle will immediately become 0%, the foregoing representing, for example, 359 degrees of rotation and then 0%. Also, when the sensing system malfunctions, the value 0 may be a typical failure mode.
It is a general object of the present invention to provide a digitally programmable pulse-width-modulation (PWM) converter.
In accordance with the above object, there is provided a pulse-width-modulation converter where a sensor has a full scale output which is represented by a PWM input signal having a range of 0% to 100% duty cycles including a converter for converting the duty cycle range to a start duty cycle, P1, greater than 0% but less than a stop duty cycle, P2, less than or equal to 100%, P1 to P2 still representing said full scale output of the sensor, the converter comprises first and second clock means, the first clock means counting the pulse widths of the PWM input signal and sensing its pulse repetition rate, the second clock means having a predetermined and higher frequency than said first clock means, the ratio of said frequencies being proportional to P2-P1.